DocumentCode
323397
Title
Level-oriented GA-based test generation of logic circuits
Author
Long, Wangning ; Yang, Shiyuan ; Min, Yinghua ; Tong, Shibai
Author_Institution
Dept. of Autom., Tsinghua Univ., Beijing, China
Volume
1
fYear
1997
fDate
28-31 Oct 1997
Firstpage
563
Abstract
Investigates a level-oriented genetic algorithm (GA) technique for test generation of logic circuits. The fitness calculation method is improved. Experimental results show that the improved fitness calculation method is more effective than the previous one. It is also shown that the GA method is better than the normal random method, and the adaptive probability of crossover (Pc) does not necessarily result in higher test generation performance. With the rapid development of parallel computing, GA-based test generation is promising for practical applications
Keywords
automatic testing; circuit testing; electronic engineering computing; genetic algorithms; logic circuits; logic testing; parallel processing; adaptive crossover probability; fitness calculation method; level-oriented genetic algorithm technique; logic circuit test generation; parallel computing; random method; test generation performance; Automatic testing; Automation; Circuit faults; Circuit testing; Combinational circuits; Genetic algorithms; Genetic mutations; Logic circuits; Logic testing; Parallel processing;
fLanguage
English
Publisher
ieee
Conference_Titel
Intelligent Processing Systems, 1997. ICIPS '97. 1997 IEEE International Conference on
Conference_Location
Beijing
Print_ISBN
0-7803-4253-4
Type
conf
DOI
10.1109/ICIPS.1997.672846
Filename
672846
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