• DocumentCode
    3234056
  • Title

    SyReC: A programming language for synthesis of reversible circuits

  • Author

    Wille, R. ; Offermann, S. ; Drechsler, R.

  • Author_Institution
    Inst. of Comput. Sci., Univ. of Bremen, Bremen, Germany
  • fYear
    2010
  • fDate
    14-16 Sept. 2010
  • Firstpage
    1
  • Lastpage
    6
  • Abstract
    Reversible logic serves as a basis for emerging technologies like quantum computing and additionally has applications in low-power design. In particular, since traditional technologies like CMOS are going to reach their limits in the near future, reversible logic has been established as a promising alternative. Thus, in the last years this area started to become intensely studied by researchers. In particular, how to efficiently synthesize complex reversible circuits is an important question. So far, only synthesis approaches are available that rely on Boolean function representations, like e.g. truth tables or decision diagrams. In this paper, we propose the programming language SyReC that allows to specify and afterwards to automatically synthesize reversible circuits. Using an existing programming language for reversible software design as basis, we introduce new concepts, operations, and restrictions allowing the specification of reversible hardware. Furthermore, a hierarchical approach is presented that automatically transforms the respective statements and operations of the new programming language into a reversible circuit. Experiments show that with the proposed method, complex circuits can be easily specified and synthesized while with previous approaches this often is not possible due to the limits caused by truth tables or decision diagrams.
  • Keywords
    Boolean functions; binary decision diagrams; digital circuits; logic design; low-power electronics; network synthesis; programming languages; Boolean function representation; SyReC; complex circuit; decision diagram; programming language; reversible circuit synthesis; reversible hardware specification; reversible logic; reversible software design; truth table;
  • fLanguage
    English
  • Publisher
    iet
  • Conference_Titel
    Specification & Design Languages (FDL 2010), 2010 Forum on
  • Conference_Location
    Southampton
  • Type

    conf

  • DOI
    10.1049/ic.2010.0150
  • Filename
    5775130