Modeling switched capacitor sigma delta modulator nonidealities in SystemC-AMS

For the design of complex systems both accurate and abstract models are required. Especially for analog subsystems this trade-off is difficult. The new SystemC AMS extensions offer high simulation performance, but also serious restrictions. In this paper we model a switched capacitor sigma delta modulator using the SystemC AMS extensions. The model combines high simulation performance while modeling sampling jitter, kT/C noise, switch non-linearities and operational amplifier non idealities (such as finite gain, finite bandwidth, slew rate, leakage and saturation effect). We present a complete set of sub-modules representing those non idealities implemented in SystemC-AMS. Finally, the proposed sub-modules are used to simulate a low pass second order sigma delta modulator of which results are presented.