Title :
A new multi-processor architecture for parallel lazy cyclic reference counting
Author :
Lins, Rafael Dueire
Author_Institution :
Dept. de Eletronica e Sistemas, Univ. Fed. de Pernambuco, Recife, Brazil
Abstract :
Reference counting is the memory management technique of most widespread use today. This paper presents a new multi-processor architecture for parallel cyclic reference counting. In this architecture, there is no direct mutator-collector communication and synchronization is kept minimal.
Keywords :
multiprocessing systems; parallel architectures; storage management; memory management technique; multiprocessor architecture; mutator-collector communication; mutator-collector synchronization; parallel lazy cyclic reference counting; Algorithm design and analysis; Computer languages; Data structures; Heuristic algorithms; Java; Memory management; Parallel architectures; Parallel programming; Programming profession; Virtual machining;
Conference_Titel :
Computer Architecture and High Performance Computing, 2005. SBAC-PAD 2005. 17th International Symposium on
Print_ISBN :
0-7695-2446-X
DOI :
10.1109/CAHPC.2005.6
