Title :
Use of JTAG boundary-scan for testing electronic circuit boards and systems
Author :
Van Ngo, Be ; Law, Peter ; Sparks, Anthony
Abstract :
Todaypsilas complex printed circuit boards and high-density ball-grid array and other chip-size package ICs have led to the standardization and wide-spread use of JTAG (Joint Test Action Group) boundary-scan technology for test and debug. Topics include the evolution of JTAG standards, basic fundamentals of boundary-scan architecture, board testability using boundary-scan and system-level testing. Additionally, this paper will address the advantages and disadvantages of JTAG testing and propose advanced JTAG test methodologies including remote testing and diagnostics.
Keywords :
boundary scan testing; integrated circuit testing; printed circuit testing; JTAG boundary-scan; chip-size package IC; complex printed circuit boards; electronic circuit boards testing; high-density ball-grid array; joint test action group; remote diagnostics; remote testing; system-level testing; Automatic testing; Chip scale packaging; Circuit faults; Circuit testing; Electronic circuits; Electronic equipment testing; Inspection; Logic testing; Pins; System testing;
Conference_Titel :
AUTOTESTCON, 2008 IEEE
Conference_Location :
Salt Lake Cirty, UT
Print_ISBN :
978-1-4244-2225-8
Electronic_ISBN :
1088-7725
DOI :
10.1109/AUTEST.2008.4662576
