DocumentCode
3234506
Title
Novel Asymmetric Raised Source/Drain Extension MOSFET
Author
Imoto, Tsutomu ; Tateshita, Yasushi ; Kobayashi, Toshio
Author_Institution
Semicond. Technol. Dev. Group, Sony Corp., Atsugi-shi
fYear
2006
fDate
6-8 Sept. 2006
Firstpage
385
Lastpage
388
Abstract
A novel asymmetric MOSFET structure is proposed which provides an excellent tradeoff between current drivability and manufacturability for planar MOSFET technology. To achieve this, the "corner effect" is utilized to suppress short channel effects, while degradation in current drivability caused by the corner effect is avoided by an asymmetric design. Using simulation, it is shown that this structure enlarges the tolerance for the junction depth of source/drain extensions by a factor of three, without sacrificing current drivability, compared to the optimal symmetric structure also found in this work. This asymmetric structure is a superior design strategy for planar MOSFETs and can be considered as one of the most promising candidates for 32nm-node MOSFETs
Keywords
MOSFET; semiconductor device manufacture; semiconductor device models; semiconductor junctions; asymmetric design; corner effect; current drivability; junction depth; metal-oxide-semiconductor field effect transistor; planar MOSFET technology; short channel effect; source-drain extension MOSFET; Buildings; Conducting materials; Degradation; Doping profiles; Electrodes; Inorganic materials; MOSFET circuits; Parasitic capacitance; Semiconductor device manufacture; Threshold voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Simulation of Semiconductor Processes and Devices, 2006 International Conference on
Conference_Location
Monterey, CA
Print_ISBN
1-4244-0404-5
Type
conf
DOI
10.1109/SISPAD.2006.282915
Filename
4061658
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