DocumentCode :
3234635
Title :
Design method of viterbi decoding of convolutional code based on VHDL
Author :
Zengliang, Zhang ; Cheng, Xiao
Author_Institution :
Dept. of Electron. Eng., North China Inst. of Aerosp. Eng., Langfang, China
fYear :
2011
fDate :
27-29 May 2011
Firstpage :
178
Lastpage :
181
Abstract :
As an example of convolutional code (2, 1, 5), designing of constitute the decoder module and the system with timing chart and VHDL, which obtains the corresponding simulation results. It is basing on the composition block diagram. Through the simulation results and performance analysis, the hard decision viterbi decoder has a strong error correction, high efficiency, stability, easy to implement extensions and etc.
Keywords :
Viterbi decoding; convolutional codes; error correction codes; hardware description languages; stability; VHDL; composition block diagram; convolutional code; decoder module; error correction; hard decision viterbi decoder; timing chart; Clocks; Decoding; Viterbi algorithm; VHDL; convolutional code; hard decision; viterbi decoder;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Communication Software and Networks (ICCSN), 2011 IEEE 3rd International Conference on
Conference_Location :
Xi´an
Print_ISBN :
978-1-61284-485-5
Type :
conf
DOI :
10.1109/ICCSN.2011.6014417
Filename :
6014417
Link To Document :
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