Title :
Application of look-up table approach to high-K gate dielectric MOS transistor circuits
Author :
Kumar, D. Vinay ; Mohapatra, Nihar R. ; Patil, Mahesh B. ; Rao, V. Ramgopal
Author_Institution :
Dept. of Electr. Eng., Indian Inst. of Technol., Mumbai, India
Abstract :
In this paper, we study the circuit performance issues of high-K gate dielectric MOSFETs using the Look-up Table (LUT) approach. The LUT approach is implemented in a public-domain circuit simulator SEQUEL. We observed an excellent match between LUT simulator and mixed mode simulations using MEDICI. This work clearly demonstrates the predictive power of the new simulator, as it enables evaluation of circuits directly from device simulation results without going through model parameter extraction.
Keywords :
MOSFET circuits; circuit simulation; semiconductor device models; table lookup; MEDICI mixed-mode simulation; MOS transistor circuit; SEQUEL public-domain circuit simulator; high-K gate dielectric; look-up table; Circuit optimization; Circuit simulation; Interpolation; MOSFETs; Medical simulation; Predictive models; Semiconductor process modeling; Solid modeling; Table lookup; Voltage;
Conference_Titel :
VLSI Design, 2003. Proceedings. 16th International Conference on
Print_ISBN :
0-7695-1868-0
DOI :
10.1109/ICVD.2003.1183126