DocumentCode :
3235849
Title :
Power MOSFET packaged-induced on-resistance reductions
Author :
Deram, Ivana ; Nee, Suzanne ; Cheng, Clara ; Walker, Larry ; Robb, Francine
Author_Institution :
Power Products Div., Motorola Inc., Phoenix, AZ, USA
fYear :
1997
fDate :
26-29 May 1997
Firstpage :
113
Lastpage :
115
Abstract :
It is shown that on-resistances of high-voltage n-channel power MOSFETs decrease following packaging in plastic packages because of piezoelectric effects created by plastic mold compound stresses. This effect is most pronounced with large die. Extreme care should be exercised when making packaging process/material changes, as on-resistance values could be adversely affected
Keywords :
plastic packaging; power MOSFET; semiconductor device packaging; semiconductor device reliability; thermal stresses; 100 to 1200 V; high-voltage n-channel power MOSFETs; large die; packaging induced parametric shifts; piezoelectric effects; plastic mold compound stresses; plastic packages; reliability; temperature cycling; Assembly; MOSFET circuits; Packaging machines; Plastic packaging; Power MOSFET; Power measurement; Pulse measurements; Temperature sensors; Voltage; Wafer scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Power Semiconductor Devices and IC's, 1997. ISPSD '97., 1997 IEEE International Symposium on
Conference_Location :
Weimar
ISSN :
1063-6854
Print_ISBN :
0-7803-3993-2
Type :
conf
DOI :
10.1109/ISPSD.1997.601448
Filename :
601448
Link To Document :
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