DocumentCode
3236346
Title
Process Mapping Based on Memory Access Traces
Author
Cruz, Eduardo H M ; Alves, Marco A Z ; Navaux, Philippe O A
Author_Institution
Programa de Pos-Grad. em Comput., Univ. Fed. do Rio Grande do Sul, Rio Grande do Sul, Brazil
fYear
2010
fDate
27-30 Oct. 2010
Firstpage
72
Lastpage
79
Abstract
Process mapping is a technique widely used in parallel machines to provide performance gains by improving the use of resources such as interconnections and cache memory hierarchy. The problem to find the best mapping is considered NP-Hard and, in shared memory environments, there is the additional difficulty to find the communication pattern, which is implicit and occurs through memory accesses. In this context, this work aims to improve the performance of parallel applications that use shared memory. For that, it was developed a method for analysis of the shared memory which identifies the mapping without requiring any previous knowledge of the application behavior. Applications from the NAS Parallel Benchmarks (NPB) were used in these experiments, showing performance gains of up to 42% compared to the native scheduler of the operating system.
Keywords
cache storage; operating systems (computers); parallel machines; scheduling; storage management; NAS parallel benchmarks; cache memory hierarchy; communication pattern; memory access traces; native scheduler; operating system; parallel machines; process mapping; Benchmark testing; Computational fluid dynamics; Instruction sets; Instruments; Microwave integrated circuits; Monitoring; Performance gain;
fLanguage
English
Publisher
ieee
Conference_Titel
Computing Systems (WSCAD-SCC), 2010 11th Symposium on
Conference_Location
Petropolis
Print_ISBN
978-1-4244-8974-9
Electronic_ISBN
978-0-7695-4274-4
Type
conf
DOI
10.1109/WSCAD-SCC.2010.26
Filename
5645527
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