DocumentCode :
3236370
Title :
Fault-tolerance of associative memories based on neural networks
Author :
Ruckert, U. ; Kreuzer, I. ; Tryba, V. ; Goser, K.
Author_Institution :
Bauelemente der Electrotechnik, Dortmund Univ., West Germany
fYear :
1989
fDate :
8-12 May 1989
Firstpage :
18994
Lastpage :
20090
Abstract :
The authors discuss the hardware fault tolerance of associative memories. They study device parameter variations across a chip, which affect essentially the characteristics of analog circuits used by several architectures. The effects of these errors on the performance are examined by means of three typical representatives: the Hopfield model, the self-organizing feature map, and the Boltzmann machine. The authors present a worst-case estimation of the guaranteed fault tolerance of these networks and discuss the consequences for the features of the associative memories. The main result is that the fault tolerance decreases with the number of weights but can be improved by using spare codes or self-organization in connection with added resources
Keywords :
content-addressable storage; fault tolerant computing; memory architecture; neural nets; Boltzmann machine; Hopfield model; analog circuits; architectures; associative memories; chip; device parameter variations; guaranteed fault tolerance; hardware fault tolerance; neural networks; performance; self-organization; self-organizing feature map; spare codes; weights; worst-case estimation; Analog circuits; Associative memory; Circuit faults; Fault tolerance; Hardware; Memory architecture; Neural networks; Redundancy; Switches; Wiring;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
CompEuro '89., 'VLSI and Computer Peripherals. VLSI and Microelectronic Applications in Intelligent Peripherals and their Interconnection Networks', Proceedings.
Conference_Location :
Hamburg
Print_ISBN :
0-8186-1940-6
Type :
conf
DOI :
10.1109/CMPEUR.1989.93343
Filename :
93343
Link To Document :
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