• DocumentCode
    3236910
  • Title

    SPARK: a high-level synthesis framework for applying parallelizing compiler transformations

  • Author

    Gupta, Sumit ; Dutt, Nikil ; Gupta, Rajesh ; Nicolau, Alex

  • Author_Institution
    Center for Embedded Comput. Syst., California Univ., Irvine, CA, USA
  • fYear
    2003
  • fDate
    4-8 Jan. 2003
  • Firstpage
    461
  • Lastpage
    466
  • Abstract
    This paper presents a modular and extensible high-level synthesis research system, called SPARK, that takes a behavioral description in ANSI-C as input and produces synthesizable register-transfer level VHDL. SPARK uses parallelizing compiler technology, developed previously, to enhance instruction-level parallelism and re-instruments it for high-level synthesis by incorporating ideas of mutual exclusivity of operations, resource sharing and hardware cost models. In this paper, we present the design flow through the SPARK system, a set of transformations that include speculative code motions and dynamic transformations and show how these transformations and other optimizing synthesis and compiler techniques are employed by a scheduling heuristic. Experiments are performed on two moderately complex industrial applications, namely MPEG-1 and the GIMP image processing tool. The results show that the various code transformations lead to up to 70 % improvements in performance without any increase in the overall area and critical path of the final synthesized design.
  • Keywords
    circuit optimisation; hardware description languages; heuristic programming; high level synthesis; image processing; parallelising compilers; processor scheduling; ANSI-C behavioral description; GIMP image processing; MPEG-1; SPARK modular system; code optimization; dynamic transformations; hardware cost models; high-level synthesis framework; instruction-level parallelism; operation mutual exclusivity; optimizing synthesis; parallelizing compiler transformations; register-transfer level VHDL; resource sharing; scheduling heuristic; speculative code motions; Costs; Design optimization; Dynamic scheduling; Hardware; High level synthesis; Image processing; Job shop scheduling; Optimizing compilers; Resource management; Sparks;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Design, 2003. Proceedings. 16th International Conference on
  • ISSN
    1063-9667
  • Print_ISBN
    0-7695-1868-0
  • Type

    conf

  • DOI
    10.1109/ICVD.2003.1183177
  • Filename
    1183177