Title :
Implementation of Asynchronous Receiver/ Transmitter Based on FPGA
Author :
Xiao-Li Hu ; Feng-Ying Wang ; Bo Chen
Author_Institution :
Sch. of Inf. Eng., Inner Mongolia Univ. of Sci. & Technol., Baotou, China
Abstract :
This article discusses the basic principles of the universal asynchronous receiver/transmitter, and design and realize of universal asynchronous receiver/transmitter base on Alter a NIOSII Development Board integrated in EDA experiment platform. the main chip Model of the FPGA is EP1C12F324C8. Circuit design with VHDL hardware description language programming, developing software is the QuartusII9.0.
Keywords :
computer interfaces; data communication equipment; field programmable gate arrays; hardware description languages; transceivers; Alter a NIOSII Development Board; EDA; EP1C12F324C8 FPGA; QuartusII9.0; VHDL hardware description language programming; universal asynchronous receiver; universal asynchronous transmitter; Educational institutions; Field programmable gate arrays; Frequency conversion; Ports (Computers); Receivers; Synchronization; Transmitters; FPGA; NIOSII Development Board; UART;
Conference_Titel :
Intelligent Systems (GCIS), 2012 Third Global Congress on
Conference_Location :
Wuhan
Print_ISBN :
978-1-4673-3072-5
DOI :
10.1109/GCIS.2012.16
