DocumentCode :
3237112
Title :
A low power-delay product page-based address bus coding method
Author :
Tsai, Chi-Ming ; Liao, Guang-Wan ; Lin, Rung-Bin
Author_Institution :
Dept. of Comput. Eng. & Sci., Yuan-Ze Univ., Chung-li, Taiwan
fYear :
2003
fDate :
4-8 Jan. 2003
Firstpage :
521
Lastpage :
526
Abstract :
The working-zone encoding (WZE) method employing locality of memory reference was previously proposed to reduce address bus switching activity. This paper presents an encoding method that retains the advantage of WZE in switching activity reduction, but does not incur excessive path delay and area overhead. The proposed method is scalable for large bus width. Our encoder (decoder) has up to 58% (64%) delay reduction and 70% (62%) area reduction for a 32-bit multiplexed address bus. The switching activity is increased by 15% (18%) for the case without (with) a cache if the switching activity overhead is not counted. If the overhead is counted, the switching activity is reduced by 32% (17%) for the case without (with) a cache.
Keywords :
digital integrated circuits; encoding; low-power electronics; storage allocation; address bus switching activity reduction; area overhead; cache; low power-delay product address bus coding; memory reference locality; multiplexed address bus; page-based address bus coding method; path delay; scalable method; switching activity overhead; working-zone encoding method; Councils; Decoding; Delay effects; Encoding; Interleaved codes; Power engineering and energy; Power engineering computing; Probability; Registers; Table lookup;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Design, 2003. Proceedings. 16th International Conference on
ISSN :
1063-9667
Print_ISBN :
0-7695-1868-0
Type :
conf
DOI :
10.1109/ICVD.2003.1183187
Filename :
1183187
Link To Document :
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