DocumentCode :
3237636
Title :
Fully memory based address translation in user-level network interface
Author :
Yongqing, Wang ; Minxuan, Zhang
Author_Institution :
Dept. of Comput., Nat. Univ. of Defense Technol., Changsha, China
fYear :
2011
fDate :
27-29 May 2011
Firstpage :
351
Lastpage :
355
Abstract :
User-level communications greatly alleviate the software overhead of the communication subsystem by allowing applications to access the network interface directly. Such a direct data path requires the network interface to know the physical memory location of the buffer. Thus, efficient virtual-to-physical address translation is critical. This paper presents a efficient address translation scheme based on address-translation-table where every translation is done on the network interface controller without operating system involvement and miss handling, and zero copy data transfer can be implemented between processes. Adopting this mechanism, we design our communication subsystem oriented to cluster systems based on PCI-Express 2.0. The experimental results show the lowest one-way latency of 2.37us and the peak bandwidth of 6038MB/s, which is the fastest network interface at present.
Keywords :
buffer storage; network interfaces; peripheral interfaces; PCI-Express 2.0; address-translation-table; bit rate 6038 Mbit/s; buffer physical memory location; cluster systems; fully memory based address translation; user-level communications; user-level network interface controller; virtual-to-physical address translation; Bandwidth; Bidirectional control; Indexes; Prefetching; Protocols; Random access memory; Reliability; RDMA; address translation; system call; user-level network interface;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Communication Software and Networks (ICCSN), 2011 IEEE 3rd International Conference on
Conference_Location :
Xi´an
Print_ISBN :
978-1-61284-485-5
Type :
conf
DOI :
10.1109/ICCSN.2011.6014582
Filename :
6014582
Link To Document :
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