Title :
Functional decomposition for FPGA based designs: a weighted graph approach for encoding of compatible classes
Author :
Selvaraj, Henry ; Venkatesan, Muthukumar ; Bignall, Bob ; Verma, Brijesh
Author_Institution :
Nevada Univ., Las Vegas, NV, USA
Abstract :
Functional decomposition plays an important role in the design of FPGA-based circuits because their structure only imposes constraints on the number of inputs. Several decomposition techniques have been developed, and they show better area and level optimization. In a multi-level decomposition method, the coding of the decomposed function is an important factor that influences further decomposition at lower levels. It is particularly important for real-life functions that have a lot of “don´t cares”. In this paper, we propose a coding strategy that retains as many “don´t cares” as possible. The resulting truth table is smaller in size
Keywords :
circuit optimisation; encoding; field programmable gate arrays; graph theory; logic design; FPGA-based circuits; area optimization; circuit structure; coding strategy; compatible class encoding; decomposed function coding; don´t cares; functional decomposition; input constraints; level optimization; multi-level decomposition method; truth table size; weighted graph; Boolean functions; Calculus; Circuits; Encoding; Field programmable gate arrays; Input variables; Merging; Principal component analysis;
Conference_Titel :
Computational Intelligence and Multimedia Applications, 1999. ICCIMA '99. Proceedings. Third International Conference on
Conference_Location :
New Delhi
Print_ISBN :
0-7695-0300-4
DOI :
10.1109/ICCIMA.1999.798532