DocumentCode :
3237759
Title :
High-Precision Design of DDS Based on FPGA
Author :
Xiaochu Wang ; Qiujun Mei
Author_Institution :
Sch. of Electromech. Eng., Guangdong Univ. of Technol., Guangzhou, China
fYear :
2012
fDate :
6-8 Nov. 2012
Firstpage :
386
Lastpage :
389
Abstract :
In order to achieve the goal of higher accuracy of DDS, In this paper, we will concentrate to modify and improve pipelined accumulator and the ROM lookup table which is based on the Cordic algorithm on the base of traditional DDS. And compared with the advantages and disadvantages of traditional algorithm, experiments have proofed that the Cordic algorithm can solve the problems of disorder, decentralization, big truncation error and instability of the traditional DDS output signal and it can also save the hardware resources up to 30%. It has obvious advantages showed on the speed, accuracy and hardware resources of the system.
Keywords :
direct digital synthesis; field programmable gate arrays; integrated circuit design; table lookup; Cordic algorithm; DDS output signal; FPGA; ROM lookup table; high-precision design; pipelined accumulator; truncation error; Algorithm design and analysis; Clocks; Field programmable gate arrays; Frequency control; Frequency synthesizers; Read only memory; Table lookup; DDS; accumulator; cordic algorithm;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Intelligent Systems (GCIS), 2012 Third Global Congress on
Conference_Location :
Wuhan
Print_ISBN :
978-1-4673-3072-5
Type :
conf
DOI :
10.1109/GCIS.2012.20
Filename :
6449560
Link To Document :
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