Title :
Low-cost fixed-width squarer by using probability-compensated circuit
Author_Institution :
Dept. of Inf. & Comput. Eng., Chung Yuan Christian Univ., Zhongli, Taiwan
Abstract :
A simple and uniform compensated bias for a fixed-width squarer is proposed. By employing the expected value of truncation parts, truncation errors can be efficiently alleviated. The proposed squarer derives a simple compensated bias and achieves a small area. The results show that the proposed squarer achieves low-cost, high-accuracy performance and yields higher values than previous designs do, particularly regarding the value of accuracy divided by the area-delay product.
Keywords :
digital arithmetic; integrated circuit design; logic design; multiplying circuits; probability; area-delay product; low cost fixed width squarer; probability compensated circuit; uniform compensated bias;
Journal_Title :
Electronics Letters
DOI :
10.1049/el.2014.1058