• DocumentCode
    3238562
  • Title

    Temperature Control of High-Performance Multi-core Platforms Using Convex Optimization

  • Author

    Murali, Srinivasan ; Mutapcic, Almir ; Atienza, David ; Gupta, Rajesh ; Boyd, Stephen ; Benini, Luca ; De Micheli, Giovanni

  • Author_Institution
    LSI, EPFL, Lausanne
  • fYear
    2008
  • fDate
    10-14 March 2008
  • Firstpage
    110
  • Lastpage
    115
  • Abstract
    With technology advances, the number of cores integrated on a chip and their speed of operation is increasing. This, in turn is leading to a significant increase in chip temperature. Temperature gradients and hot-spots not only affect the performance of the system, but also lead to unreliable circuit operation and affect the life-time of the chip. Meeting the temperature constraints and reducing the hot-spots are critical for achieving reliable and efficient operation of complex multi-core systems. In this work, we present Pro-Temp, a convex optimization based method that pro-actively controls the temperature of the cores, while minimizing the power consumption and satisfying application performance constraints. The method guarantees that the temperature of the cores are below a user- defined threshold at all instances of operation, while also reducing the hot-spots. We perform experiments on several realistic multi-core benchmarks, which show that the proposed method guarantees that the cores never exceed the maximum temperature limit, while matching the application performance requirements. We compare this to traditional methods, where we find several temperature violations during the operation of the system.
  • Keywords
    convex programming; integrated circuit design; integrated circuit reliability; microprocessor chips; temperature control; thermal management (packaging); Pro-Temp method; chip temperature; convex optimization; high-performance multicore platforms; hot-spots reduction; power consumption reduction; reliable circuit operation; temperature control; temperature gradients; thermal-aware processor design; Circuits; Energy consumption; Energy management; Frequency; Large scale integration; Permission; Power system management; Power system reliability; Temperature control; Thermal management; Thermal-aware design; dynamic frequency scaling; static and dynamic optimization; temperature control;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design, Automation and Test in Europe, 2008. DATE '08
  • Conference_Location
    Munich
  • Print_ISBN
    978-3-9810801-3-1
  • Electronic_ISBN
    978-3-9810801-4-8
  • Type

    conf

  • DOI
    10.1109/DATE.2008.4484671
  • Filename
    4484671