A systematic approach to statistical simulation of complex analog integrated circuits

Author

Swidzinski, J.F. ; Alexander, D. ; Qu, M. ; Styblinski, M.A.

Author_Institution

Dept. of Electr. Eng., Texas A&M Univ., College Station, TX, USA

fYear

1997

fDate

35589

Firstpage

86

Lastpage

89

Abstract

It is well known that during the manufacturing process integrated circuits are subject to process parameter variations which result in the inherent performance fluctuations. Characterization of these fluctuations in behavioral modeling is extremely important if the high yield of the manufactured circuits is to be achieved. The methodology presented in the paper allows one to build behavioral statistical models which give designers insight into the influence of process and mismatch variations on the operation of the complex IC. Successful statistical simulation of an analog phase-locked loop is presented

Keywords

analogue integrated circuits; integrated circuit modelling; integrated circuit yield; phase locked loops; statistical analysis; analog PLL simulation; analog integrated circuits; analog phase-locked loop; behavioral statistical models; characterization; complex analog ICs; high yield; manufacturing process; mismatch variations; performance fluctuations; process parameter variations; statistical simulation; Analog integrated circuits; Circuit simulation; Fluctuations; Integrated circuit modeling; Integrated circuit noise; Mathematical model; Principal component analysis; Random variables; Semiconductor device modeling; Semiconductor device noise;

fLanguage

English

Publisher

ieee

Conference_Titel

Statistical Metrology, 1997 2nd International Workshop on

Conference_Location

Kyoto

Print_ISBN

0-7803-3737-9

Type

conf

DOI

10.1109/IWSTM.1997.629420

Filename

629420