• DocumentCode
    3239357
  • Title

    Surface Void Migration in Copper (Cu) VLSI Interconnect

  • Author

    Pete, D.J. ; Helonde, J.B. ; Bhattacharya, Rohan

  • Author_Institution
    Datta Meghe Coll. of Eng., Navi Mumbai, India
  • fYear
    2009
  • fDate
    16-18 Dec. 2009
  • Firstpage
    179
  • Lastpage
    181
  • Abstract
    Electromigration-induced void evolutions in various dual-inlaid Copper (Cu) interconnect structures were simulated by applying a phenomenological model resorting to Monte Carlo based simulations, which considers redistribution of heterogeneously nucleated voids and/or pre-existing vacancy clusters at the Cu/dielectric cap interface during electromigration. The results indicate that this model can qualitatively explain the electromigration-induced void evolutions observations in many studies reported by several researchers heretofore. These findings warrant need to reinvestigate technologically important electromigration mechanisms by developing rigorous models based on similar concepts.
  • Keywords
    Monte Carlo methods; VLSI; copper; electromigration; integrated circuit interconnections; nucleation; Cu; Monte Carlo based simulations; VLSI interconnect; electromigration; nucleated voids; surface void migration; vacancy clusters; void evolutions; Cathodes; Copper; Dielectrics; Educational institutions; Electromigration; Electrons; Integrated circuit interconnections; Numerical analysis; Testing; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Emerging Trends in Engineering and Technology (ICETET), 2009 2nd International Conference on
  • Conference_Location
    Nagpur
  • Print_ISBN
    978-1-4244-5250-7
  • Electronic_ISBN
    978-0-7695-3884-6
  • Type

    conf

  • DOI
    10.1109/ICETET.2009.217
  • Filename
    5395026