DocumentCode
3239725
Title
SMT process recommendations. Defect minimization methods for a no-clean SMT process
Author
Rajewski, Kurt
Author_Institution
Market Technol., Kester Solder Co., Des Plaines, IL, USA
fYear
1995
fDate
10-12 Oct 1995
Firstpage
354
Lastpage
362
Abstract
Key competitive advantages can be obtained through the minimization of process defects and disruptions. In today´s electronic manufacturing processes there are many variables to optimize. By gaining an understanding of what the defects are, and where they come from, is a key step in the process towards defect free/six sigma manufacturing. In the last decade, surface mount technology processes have been slowly converting towards the no-clean philosophy. This new trend has spawned new processing issues which need to be addressed. This paper investigates solutions to current problems in the processing of no-clean SMT processes. These solutions will be critical in the development of successful processes in the electronics industry in the years ahead
Keywords
manufacturing processes; printed circuit manufacture; quality control; reflow soldering; surface mount technology; QC; SMT; defect free manufacturing; defect minimization; electronic manufacturing processes; no-clean philosophy; process recommendations; six sigma manufacturing; Consumer electronics; Electronics industry; Manufacturing processes; Minimization methods; Paper technology; Soldering; Surface cleaning; Surface-mount technology; Technology management; Temperature;
fLanguage
English
Publisher
ieee
Conference_Titel
Northcon 95. I EEE Technical Applications Conference and Workshops Northcon95
Conference_Location
Portland, OR
Print_ISBN
0-7803-2639-3
Type
conf
DOI
10.1109/NORTHC.1995.485096
Filename
485096
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