DocumentCode :
323973
Title :
Polyphase filter architectures for MPEG audio using fast IDCT
Author :
Shih, Chen-Wei ; Ling, Nam
Author_Institution :
Dept. of Electr. Eng., Santa Clara Univ., CA, USA
Volume :
1
fYear :
1997
fDate :
2-5 Nov. 1997
Firstpage :
416
Abstract :
We present a fast architecture by using a fast IDCT algorithm for polyphase analysis subband filtering, a computational-intensive operation in MPEG audio coding. Our basic approach is to use only one adder/subtractor and one multiplier, but each has its own data bus, and a process controller is used to control the overall processing. The bus width is found by finite wordlength simulation. Simulation results and summaries have shown that a low cost adder/subtractor and multiplier in VLSI implementation can be designed for real-time applications.
Keywords :
VLSI; adders; audio coding; code standards; digital filters; discrete cosine transforms; inverse problems; multiplying circuits; telecommunication standards; transform coding; MPEG audio coding; VLSI; data bus; fast IDCT; fast IDCT algorithm; fast architecture; finite wordlength simulation; low cost adder/subtractor; multiplier; polyphase analysis subband filtering; polyphase filter architectures; process controller; real-time applications; simulation results; Algorithm design and analysis; Analytical models; Computational modeling; Computer architecture; Discrete cosine transforms; Equations; Filtering algorithms; Filters; Process control; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Signals, Systems & Computers, 1997. Conference Record of the Thirty-First Asilomar Conference on
Conference_Location :
Pacific Grove, CA, USA
ISSN :
1058-6393
Print_ISBN :
0-8186-8316-3
Type :
conf
DOI :
10.1109/ACSSC.1997.680361
Filename :
680361
Link To Document :
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