Title :
A dynamic password chip design based on Logistic chaotic algorithm
Author :
Fei, Yu ; Jie, Zhao ; Yating, Wu
Author_Institution :
Sch. of Electron. & Inf. Eng., Shenzhen Polytech., Shenzhen, China
Abstract :
In order to solve the problem of information security, and get the chaotic random numbers for encryption, this paper analyzed the Logistic random chaos model and gave a kind of discrete Logistic chaotic algorithm which is easy for hardware realization, and completed its hardware structure design. The dynamic password chip is a typical application of random number in chaos, and this paper used the discrete Logistic chaotic algorithm mentioned above, and completed a dynamic password chip design, it has the advantages of good security, low cost, high speed, and extensive application value.
Keywords :
chaos; cryptography; field programmable gate arrays; logic design; random number generation; FPGA; chaotic random number; discrete logistic chaotic algorithm; dynamic password chip design; encryption; hardware structure design; information security; logistic random chaos model; Chaos; Computational modeling; Cryptography; Heuristic algorithms; FPGA; Logistic; chaotic; dynamic password;
Conference_Titel :
Communication Software and Networks (ICCSN), 2011 IEEE 3rd International Conference on
Conference_Location :
Xi´an
Print_ISBN :
978-1-61284-485-5
DOI :
10.1109/ICCSN.2011.6014717