DocumentCode :
3240207
Title :
MCjammer: Adaptive Verification for Multi-core Designs
Author :
Wagner, Ilya ; Bertacco, Valeria
Author_Institution :
Adv. Comput. Archit. Lab., Michigan Univ., Ann Arbor, MI
fYear :
2008
fDate :
10-14 March 2008
Firstpage :
670
Lastpage :
675
Abstract :
The challenge of verification of multi-core and multi-processor designs grows dramatically with each new generation of systems produced today. Validation of memory coherence of such systems, which include multiple levels of cache and complex protocols, constitutes a major fraction of this task. Unfortunately, current tools are incapable of addressing these challenges, allowing bugs, which cause unpredictable software behavior and wrong computation results, to slip into hardware. In this work we present a scalable approach to the verification of memory coherence protocols in large multi-core and multi-processor systems. We accomplish this task through a distributed network of cooperating agents, which feed the processors with stimuli, each agent attempting to accomplish its own verification goals and support other agents on theirs as well. The agents can dynamically change the stimuli based on coverage and pressure observed during simulation. Since each agent has a minimal knowledge of the entire system, their communication and decision process is greatly simplified. Moreover, since the agents´ view of the system is linear in the number of nodes in it, our approach can be efficiently scaled to target large multi-core systems. Experimental results on two common coherence protocols and a range of multi-core configurations demonstrate that our technique can reach high levels of coverage of the system-level protocol much faster than a constrained-random generator.
Keywords :
cache storage; formal verification; logic design; multi-agent systems; multiprocessing systems; protocols; MCjammer; adaptive verification; complex protocols; constrained-random generator; cooperating agent distributed network; decision process; memory coherence protocol verification; memory coherence validation; multicore design; multiple level cache; multiprocessor design; system-level protocol; unpredictable software behavior; Computer architecture; Computer bugs; Feedback; Feeds; Formal verification; Frequency; Hardware; Protocols; Software tools; Testing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design, Automation and Test in Europe, 2008. DATE '08
Conference_Location :
Munich
Print_ISBN :
978-3-9810801-3-1
Electronic_ISBN :
978-3-9810801-4-8
Type :
conf
DOI :
10.1109/DATE.2008.4484755
Filename :
4484755
Link To Document :
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