An efficient calibration technique for systematic current-mismatch of D/A converters

Author

Baek, Kwang-Hyun ; Choe, Myung-Jun ; Kang, Sung-Mo Steve

Author_Institution

Rockwell Sci. Co., Thousand Oaks, CA, USA

fYear

2003

fDate

20-21 Feb. 2003

Firstpage

80

Lastpage

84

Abstract

This paper presents a current calibration technique for systematic mismatch in current-cell array. The proposed technique is suitable for GHz-range current-steering D/A converters because of an efficient and totally independent calibration operation. Behavioral simulation and measurement results show that static and yield performance of a D/A converter can be enhanced significantly by using the proposed technique. A measured reduction in INL and DNL errors before and after calibration is from +33.2/-60.1 LSB to +1.28/-1.28 LSB and from +10.2/-12.8 LSB to +2.56/-1.28 LSB in 12-bit resolution.

Keywords

calibration; circuit simulation; digital-analogue conversion; integrated circuit yield; 12 bit; DNL errors; INL errors; behavioral simulation; calibration technique; current calibration; current-steering D/A converters; static performance; systematic current-mismatch; yield performance; Calibration; Circuits; Doping; Equations; Error correction; MOS devices; Size control; Transconductance; Very large scale integration; Voltage control;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI, 2003. Proceedings. IEEE Computer Society Annual Symposium on

Print_ISBN

0-7695-1904-0

Type

conf

DOI

10.1109/ISVLSI.2003.1183356

Filename

1183356