Chip set for high performance lossless image compression and entropy coding

Author

Venbrux, J. ; Liu, Muye

Author_Institution

NASA Space Eng. Res. Center, Idaho Univ., Moscow, ID, USA

Volume

5

fYear

1992

fDate

23-26 Mar 1992

Firstpage

685

Abstract

The first Rice algorithm chip set is described. It operates under laboratory conditions at 25 Msamples/sec independent of entropy or quantization (4-14 b/pixel). The algorithm is lossless and adapts to changing entropy conditions, making it suitable for images. The algorithm requires no external RAM and compression performance exceeds that of differential pulse code modulation (DPCM) with UNIX compress. The encoder can operate at twice the decoding rate. In the laboratory, most encoder parts were fully functional at 60 Msamples/sec, or 840 Mbits/sec at N=14. The chips have been fabricated in a 1.0-μm CMOS process and are 5 mm on a side

Keywords

CMOS integrated circuits; data compression; image coding; vector quantisation; 1.0 micron; 840 Mbits/s; CMOS process; Rice algorithm chip set; compression performance; decoding rate; entropy coding; lossless image compression; quantization; CMOS process; Decoding; Entropy; Image coding; Laboratories; Modulation coding; Performance loss; Pulse compression methods; Pulse modulation; Quantization;

fLanguage

English

Publisher

ieee

Conference_Titel

Acoustics, Speech, and Signal Processing, 1992. ICASSP-92., 1992 IEEE International Conference on

Conference_Location

San Francisco, CA

ISSN

1520-6149

Print_ISBN

0-7803-0532-9

Type

conf

DOI

10.1109/ICASSP.1992.226503

Filename

226503