ASIC implementation of the Lyon cochlea model

The design and development of an application-specific integrated circuit (ASIC) to implement the filtering and AGC sections of a new digital approximation to the Lyon/Mead analog cochlea model (1988, 1989) are described. The ASIC uses a fully synchronous bit-serial design methodology originally developed for MOS technologies by Denyer and Renshaw (1985) and adaptive subsequently for use with low cost standard cell design tools by Summerfield and Jabri (1989). The resulting device is an example of a new class of signal processing ASIC, referred to as an application-specific signal processor (ASSP). As well as presenting details of the filter and AGC structure of the new cochlea model, the paper describes the bit-serial design methodology used to implement the algorithm in real-time and in low cost ASIC form. The approach is a generic one and can be applied to a wide range of speech signal processing functions