DocumentCode
3240893
Title
Taking the risk out of embedded RISC ASIC design
Author
Auer, Dave ; Buer, Mark
fYear
1995
fDate
7-9 Nov. 1995
Firstpage
51
Abstract
The worlds leading chip designers and manufacturers have recently introduced several 32-bit Reduced Instruction Set Computing (RISC) processors designed for embedded applications in hopes of capturing their share of the 32-bit RISC market. VLSI Technology, a recognized leader in ASIC design and manufacturing, offers a 32-bit RISC solution based on the ARM architecture. Embedding a microprocessor into an ASIC design presents some interesting challenges as well as offering some powerful capabilities, both of which are discussed in this paper
Keywords
Application specific integrated circuits; Circuit simulation; Communication system control; Computer architecture; Manufacturing processes; Microprocessors; Process design; Reduced instruction set computing; Registers; Rivers;
fLanguage
English
Publisher
ieee
Conference_Titel
WESCON/'95. Conference record. 'Microelectronics Communications Technology Producing Quality Products Mobile and Portable Power Emerging Technologies'
Conference_Location
San Francisco, CA, USA
ISSN
1095-791X
Print_ISBN
0-7803-2636-9
Type
conf
DOI
10.1109/WESCON.1995.485251
Filename
485251
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