DocumentCode :
3241088
Title :
CORDIC architectures with parallel compensation of the scale factor
Author :
Villalba, J. ; Hidalgo, J.A. ; Zapata, E.L. ; Antelo, E. ; Bruguera, J.D.
Author_Institution :
Dept. Arquitectura de Computadores, Malaga Univ., Spain
fYear :
1995
fDate :
24-26 Jul 1995
Firstpage :
258
Lastpage :
269
Abstract :
The compensation of scale factor imposes significant computation overhead on the CORDIC algorithm. In this paper we will propose two algorithms and architectures in order to perform the compensation of the scale factor in parallel with the computation of the CORDIC iterations. This way it is not necessary to carry out the final multiplication or add scaling iterations in order to achieve the compensation. With the architectures we propose the dependence on n of the compensation of the scale factor disappears, and this considerably reduces the latency of the system. The architectures developed are optimized solutions for the different operating modes of the CORDIC both in conventional and in redundant arithmetic
Keywords :
digital arithmetic; parallel architectures; CORDIC algorithm; CORDIC architectures; parallel compensation; scale factor; Algebra; Arithmetic; Computer architecture; Concurrent computing; Delay; Filtering; Image processing; Iterative algorithms; Matrix decomposition; Vectors;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Application Specific Array Processors, 1995. Proceedings. International Conference on
Conference_Location :
Strasbourg
ISSN :
1063-6862
Print_ISBN :
0-8186-7109-2
Type :
conf
DOI :
10.1109/ASAP.1995.522930
Filename :
522930
Link To Document :
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