Accurate modeling of capacitive, resistive and inductive effects of interconnect

Besides reviewing the numerical techniques in computing resistance, inductance, capacitance, this paper addresses the challenges to accurately model the deep-submicron on-chip interconnects. Deriving regression equations from numerous runs of Poisson field solvers, one can easily transfer the accuracy of physical simulation to the rule-based full-chip layout parasitic extractors. Such methodology, which was implemented in the program Raphael, can be extended to the PCB and other package applications, and help create rules for place-and-route