DocumentCode :
3241160
Title :
Submicron delay calculation for accurate timing analysis
Author :
Raghavan, Vivek
fYear :
1995
fDate :
7-9 Nov. 1995
Firstpage :
124
Abstract :
Technology trends indicate that due to higher switching speeds and smaller feature sizes, interconnect contributes up to 80% of the system delay. Thus it has become imperative to include interconnect effects in timing analysis to obtain meaningful results. Designers have recognized the need to accurately extract the RC interconnect. However, there has been an absence of methodology to accurately and efficiently abstract the timing implications of the extracted RC data to higher level timing tools. Submicron delay calculators are a new emerging trend to bridge this void
Keywords :
Bridge circuits; Calculators; Capacitance; Data mining; Delay estimation; Delay systems; Propagation delay; Silicon; Timing; Wire;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
WESCON/'95. Conference record. 'Microelectronics Communications Technology Producing Quality Products Mobile and Portable Power Emerging Technologies'
Conference_Location :
San Francisco, CA, USA
ISSN :
1095-791X
Print_ISBN :
0-7803-2636-9
Type :
conf
DOI :
10.1109/WESCON.1995.485264
Filename :
485264
Link To Document :
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