Title :
Optimal MTCMOS Reactivation Under Power Supply Noise and Performance Constraints
Author :
Calimera, Andrea ; Benini, Luca ; Macii, Enrico
Author_Institution :
Politec. di Torino, Torino
Abstract :
Sleep transistor insertion is one of today´s most promising and widely adopted solutions for controlling stand-by leakage power in nanometer circuits. Although single-cycle power mode transition reduces wake-up latency, it originates large discharge current spikes, thereby causing IR-drop and inductive ground bounce for the surrounding circuit blocks. We propose a new reactivation solution which helps in controlling power supply fluctuations and in achieving minimum reactivation times. Our structure limits the turn-on current below a given threshold through sequential activation of the sleep transistors, which are connected in parallel and are sized using a novel optimal sizing algorithm. The proposed methodology is validated using HSPICE simulations of several benchmark circuits, which have been synthesized onto a commercial 65 nm CMOS technology library.
Keywords :
CMOS integrated circuits; SPICE; integrated circuit design; nanotechnology; CMOS technology library; HSPICE simulations; IR-drop; inductive ground bounce; nanometer circuits; optimal MTCMOS reactivation; performance constraints; power supply noise; size 65 nm; sleep transistor insertion; stand-by leakage power; CMOS logic circuits; CMOS technology; Circuit noise; Delay; Fault location; Logic circuits; Power supplies; Rails; Switches; Switching circuits;
Conference_Titel :
Design, Automation and Test in Europe, 2008. DATE '08
Conference_Location :
Munich
Print_ISBN :
978-3-9810801-3-1
Electronic_ISBN :
978-3-9810801-4-8
DOI :
10.1109/DATE.2008.4484807