A memory-based approach to design and implement systolic arrays for DFT and DCT

A new design and implementation approach for the discrete Fourier transform (DFT) and discrete cosine transform (DCT) is discussed. The approach, called memory-based approach, is based on a design concept of combining and exploiting both the advantages induced from the systolic array architectures and the efficient implementation techniques of substituting multipliers by read-only-memory (ROM) together. Based on this approach, the proposed arrays feature high computing speeds, low complexity and hardware cost of the processing elements (PEs), and low I/O cost. Moreover, high regularity both among and inside the PEs can be found in the proposed arrays. These merits make the proposed designs much more feasible for VLSI implementation