• DocumentCode
    3241453
  • Title

    Partitioning, predictability, P-terms and pinlocking-understanding the new CPLDs

  • Author

    Jenkins, Jesse

  • fYear
    1995
  • fDate
    7-9 Nov. 1995
  • Firstpage
    218
  • Abstract
    A discussion of the evolution of Complex Programmable Logic Devices (CPLDs) is presented, as well as the logical progression of some significant concerns about designing with CPLDs. These concerns are specifically partitioning, predictability and pinlocking. After describing these problems, a discussion of their impact on current and future architectures is presented
  • Keywords
    CMOS technology; EPROM; Integrated circuit interconnections; Logic devices; Macrocell networks; Multiplexing; Packaging; Pins; Programmable logic arrays; Programmable logic devices;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    WESCON/'95. Conference record. 'Microelectronics Communications Technology Producing Quality Products Mobile and Portable Power Emerging Technologies'
  • Conference_Location
    San Francisco, CA, USA
  • ISSN
    1095-791X
  • Print_ISBN
    0-7803-2636-9
  • Type

    conf

  • DOI
    10.1109/WESCON.1995.485280
  • Filename
    485280