DocumentCode
3241474
Title
Hardware and software support for the implementation of dipolar system simulations onto an accelerator
Author
Bera, M. ; Danese, G. ; De Lotto, I. ; Leporati, F. ; Spelgatti, A.
Author_Institution
Dipt. di Inf. e Sistemistica, Pavia Univ., Italy
fYear
2004
fDate
18-21 Dec. 2004
Firstpage
465
Lastpage
470
Abstract
This paper describes the development of the hardware and software support for a FPGA based accelerator initially conceived for MonteCarlo Metropolis simulations and then evolved to an application specific processor for accelerating floating point calculations. The accelerator is implemented onto an Altera commercial board lodging last generation Stratix family components; its simulation already showed that it is able to outperform modern processing systems in executing floating point operations. In particular the interface block, for communicating with a PC host computer and the memory handler, needed for a quick access to elaboration data, without a time consuming communication are widely described.
Keywords
application specific integrated circuits; field programmable gate arrays; floating point arithmetic; reconfigurable architectures; Altera commercial board lodging; FPGA-based accelerator; MonteCarlo Metropolis simulation; application specific processor; floating point calculation; memory handler; reconfigurable architecture; Acceleration; Clocks; Computational modeling; Field programmable gate arrays; Hardware; Informatics; Microcomputers; Modems; Multiplexing; Registers;
fLanguage
English
Publisher
ieee
Conference_Titel
Signal Processing and Information Technology, 2004. Proceedings of the Fourth IEEE International Symposium on
Print_ISBN
0-7803-8689-2
Type
conf
DOI
10.1109/ISSPIT.2004.1433819
Filename
1433819
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