• DocumentCode
    3241669
  • Title

    HardWire LCAs: a risk-free FPGA-to-ASIC migration path

  • Author

    Padovani, Richard

  • fYear
    1995
  • fDate
    7-9 Nov. 1995
  • Firstpage
    272
  • Abstract
    HardWire Logic Cell Array (LCA) products are designed to provide a simple, low-risk path for users to achieve significant cost reductions on a high-volume design that initially used the programmable FPGA. In the prototype and early production stages, for low-to-moderate volume applications, and in those applications that take advantage of the dynamically-reconfigurable nature of the FPGA device, the FPGA is the solution of choice. For high-volume applications, when the design is stable and reaches high-volume production, the HardWire device can be used in place of the original FPGA device, without using engineering resources to perform the conversion. The combination of FPGA and HardWire devices offer a fast and easy way to get electronic systems to market, while ensuring a subsequent low-risk, high-volume cost reduction path. To date, over 200 successful conversions have been performed with a first pass success rate exceeding 98%
  • Keywords
    Circuit testing; Costs; Field programmable gate arrays; Integrated circuit interconnections; Logic arrays; Logic devices; Logic functions; Logic testing; Programmable logic arrays; Signal design;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    WESCON/'95. Conference record. 'Microelectronics Communications Technology Producing Quality Products Mobile and Portable Power Emerging Technologies'
  • Conference_Location
    San Francisco, CA, USA
  • ISSN
    1095-791X
  • Print_ISBN
    0-7803-2636-9
  • Type

    conf

  • DOI
    10.1109/WESCON.1995.485290
  • Filename
    485290