DocumentCode :
3241677
Title :
Device optimization using response surface methodology with orthogonal arrays
Author :
Chiang, Paul ; Chen, Ming-Ru
Author_Institution :
United Microelectron. Corp., Hsinchu, Taiwan
fYear :
2001
fDate :
2001
Firstpage :
17
Lastpage :
20
Abstract :
An optimization technique that expands the application of response surface methodology (RSM) of conventional design-of-experiments techniques into the utilization of the Taguchi method´s orthogonal arrays is proposed to improve the efficiency of RSM. A case study of NMOS device-window check of threshold voltage is used to illustrate the implementation of this method
Keywords :
MOS integrated circuits; Taguchi methods; VLSI; integrated circuit manufacture; optimisation; surface fitting; NMOS; device optimization; device-window check; orthogonal arrays; response surface methodology; threshold voltage; Design optimization; Implants; MOS devices; Optimization methods; Response surface methodology; Robustness; Signal processing; Testing; Threshold voltage; Voltage control;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Statistical Methodology, IEEE International Workshop on, 2001 6yh.
Conference_Location :
Kyoto
Print_ISBN :
0-7803-6688-3
Type :
conf
DOI :
10.1109/IWSTM.2001.933817
Filename :
933817
Link To Document :
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