DocumentCode :
3241718
Title :
Wafer yield prediction by the Mahalanobis-Taguchi system
Author :
Asada, Masashi
Author_Institution :
Dept. of Technol. Dev., Sharp Corp., Japan
fYear :
2001
fDate :
2001
Firstpage :
25
Lastpage :
28
Abstract :
The distribution of yield from the production lines is concentrated at a high-yield area and tapers down to the lower-yield area. Production management would find it useful if the yield of individual wafers could be forecast. The yield is determined by the variability of electrical characteristics and dust. In this study, only the variability of electrical characteristics was discussed. One product was selected for study, and a Mahalanobis space was constructed from the wafers that had high yields. The Mahalanobis distances of various wafers ware calculated in order to study the relationship between yield and distance
Keywords :
Taguchi methods; VLSI; integrated circuit manufacture; integrated circuit yield; Mahalanobis distances; Mahalanobis space; Mahalanobis-Taguchi system; dust; electrical characteristics; high-yield area; production lines; wafer yield prediction; Electric variables; Electric variables measurement; Equations; Integrated circuit technology; Integrated circuit yield; Production engineering; Production management; Production systems; Semiconductor device manufacture; Semiconductor device measurement;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Statistical Methodology, IEEE International Workshop on, 2001 6yh.
Conference_Location :
Kyoto
Print_ISBN :
0-7803-6688-3
Type :
conf
DOI :
10.1109/IWSTM.2001.933819
Filename :
933819
Link To Document :
بازگشت