DocumentCode
3241727
Title
A parallel implementation of the Hopfield network on GAPP processors
Author
Papadourakis, George M. ; Heileman, Gregory L. ; Georgiopoulos, Michael
Author_Institution
Dept. of Comput. Sci., Crete Univ., Iraklion, Greece
fYear
1989
fDate
0-0 1989
Abstract
Summary form only given, as follows. A parallel hardware implementation of the popular Hopfield neural network is described. The design utilizes the geometric arithmetic parallel processor (GAPP), an SIMD machine consisting of 72 processing elements. Memory requirements and processing times are analyzed based upon the number of nodes in the network and the number of exemplar patterns. Compared with other digital implementations, this design yields significant improvements in runtime performance.<>
Keywords
neural nets; parallel architectures; performance evaluation; GAPP processors; Hopfield neural network; geometric arithmetic parallel processor; parallel architectures; performance evaluation; runtime performance; Neural networks; Parallel architectures;
fLanguage
English
Publisher
ieee
Conference_Titel
Neural Networks, 1989. IJCNN., International Joint Conference on
Conference_Location
Washington, DC, USA
Type
conf
DOI
10.1109/IJCNN.1989.118342
Filename
118342
Link To Document