Approximate circuit design by means of evolvable hardware

This paper deals with evolutionary design of approximate circuits. This class of circuits is characterized by relaxing the requirement on functional equivalence between the specification and implementation in order to reduce the area on a chip or minimize energy consumption. We proposed a CGP-based automated design method which enables to find a good trade off between key circuit parameters (functionality, area and power consumption). In particular, the digital approximate circuits consisting of elementary gates are addressed in this paper. Experimental results are provided for combinational single-output circuits and adders where two different metrics are compared for the error assessment.