DocumentCode
3242132
Title
Evaluation and reduction of electron shading damage in high temperature etching
Author
Nojiri, K. ; Kato, K. ; Kawakami, H.
Author_Institution
Device Dev. Center, Hitachi Ltd., Tokyo, Japan
fYear
1999
fDate
1999
Firstpage
29
Lastpage
32
Abstract
The effect of wafer temperature on electron shading damage has been studied using an ECR plasma etcher. The gate oxide breakdown frequency was found to increase in proportion to exp(-E/kT), where E reflects the activation energy of Qbd. The electron shading damage in high temperature etching is dramatically reduced by reducing the ion saturation current and/or reducing the electron temperature. The effect of the small Qbd at high temperature was found to be completely eliminated by changing the etching temperature from high to low before the open area clears. Consequently, the increase in the gate oxide failure at high temperature has been completely suppressed
Keywords
MOS capacitors; failure analysis; integrated circuit reliability; plasma materials processing; plasma temperature; semiconductor device breakdown; sputter etching; thermal analysis; ECR plasma etcher; MOS capacitors; SiO2-Si; charge-to-breakdown activation energy; electron shading damage; electron temperature; etching temperature; gate oxide breakdown frequency; high temperature etching; high temperature gate oxide failure; ion saturation current; wafer temperature; Electric breakdown; Electrons; Etching; Frequency; Plasma applications; Plasma temperature; Resists; Tellurium; Temperature dependence; Testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Plasma Process-Induced Damage, 1999 4th International Symposium on
Conference_Location
Monterey, CA
Print_ISBN
0-9651577-3-3
Type
conf
DOI
10.1109/PPID.1999.798801
Filename
798801
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