A cellular array designed from a Multiple-valued Decision Diagram and its fault tests

Author

Kamiura, Naotake ; Hata, Yutaka ; Yamato, Kazuharu

Author_Institution

Fac. of Eng., Himeji Inst. of Technol., Japan

fYear

1995

fDate

23-24 Nov 1995

Firstpage

20

Lastpage

24

Abstract

In this paper, we discuss easily testable cellular arrays that are constructed from Multiple-valued Decision Diagrams (MDD´s). The cellular arrays consist of cells having simple switch functions. Since control inputs that specify switches of cells are determined easily by tracing paths activated in MDD´s, our method for constructing cellular arrays is simple. We propose fault tests for multiple stuck-at faults of switch cells. We can locate any row having at least one faulty cell. We apply our array to the realizations of numerous binary and multiple-valued logic functions and compare our array with other cellular arrays

Keywords

VLSI; cellular arrays; fault diagnosis; logic CAD; logic testing; multivalued logic circuits; cellular array; fault tests; multiple stuck-at faults; multiple-valued decision diagram; switch functions; testable cellular arrays; Circuit faults; Circuit testing; Design engineering; Design for testability; Integrated circuit interconnections; Logic arrays; Logic circuits; Logic functions; Switches; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Test Symposium, 1995., Proceedings of the Fourth Asian

Conference_Location

Bangalore

Print_ISBN

0-8186-7129-7

Type

conf

DOI

10.1109/ATS.1995.485311

Filename

485311