• DocumentCode
    3242259
  • Title

    Combined thermal and thermomechanical modelling for a multi-chip QFN package with metal-core printed circuit board

  • Author

    Fan, Xuejun

  • Author_Institution
    Philips Res.-USA, Briarcliff Manor, NY, USA
  • Volume
    2
  • fYear
    2004
  • fDate
    1-4 June 2004
  • Firstpage
    377
  • Abstract
    Multi-chip quad flat no-lead (QFN) (also known as micro-leadframe (MLF)) package with split leadframe design allows the control FET, synchronous FET, driver and PWM control chips into a single package. When power density increases, thermally sensitive substrates with metal core, such as insulated metal substrate (IMS) or direct-bond copper (DBC) substrate, are required to meet the thermal requirement. However, it has not been clear how a metal-core substrate affects solder joint reliability. This paper combines the CFD-based thermal modeling with visco-plastic finite element modeling to predict both thermal behavior and mechanical performance under temperature cycling. First, the detailed thermal model is established and validated against the experiment. A two-resistor compact model, on the basis of the validated detailed model, is applied to system-level thermal analysis. It is found that the use of IMS board can reduce the board area by half compared to FR-4 board. Second, a full 3-D finite element nonlinear model is built with the temperature distributions from the thermal modeling in an accelerated cycling condition. We found that the fatigue life of solder joint decreases by a factor of 4 when IMS board is used. A comprehensive model study is performed to investigate the full 3-D model versus a 3-D slice model, as well as the impact of the linearization of center solder pad. A trade-off design in thermal performance, chip layout, leadframe design, and the selection of board material is discussed to meet both thermal and mechanical specifications.
  • Keywords
    Young´s modulus; chip scale packaging; fatigue; finite element analysis; integrated circuit design; integrated circuit modelling; integrated circuit reliability; multichip modules; printed circuit design; printed circuit layout; printed circuits; solders; temperature distribution; thermal expansion; thermal resistance; viscoplasticity; PWM control chips; chip layout; control FET; direct-bond copper substrate; fatigue life; insulated metal substrate; leadframe design; metal core printed circuit board; metal-core substrate; microleadframe package; power density; solder joint reliability; split leadframe design; synchronous FET; system-level thermal analysis; temperature distributions; thermal cycling; thermally sensitive substrates; thermomechanical modelling; three dimensional finite element nonlinear model; three dimensional slice model; trade-off design; two resistor compact model; viscoplastic finite element modeling; Driver circuits; FETs; Finite element methods; Lead; Packaging; Predictive models; Printed circuits; Pulse width modulation; Soldering; Thermomechanical processes;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Thermal and Thermomechanical Phenomena in Electronic Systems, 2004. ITHERM '04. The Ninth Intersociety Conference on
  • Print_ISBN
    0-7803-8357-5
  • Type

    conf

  • DOI
    10.1109/ITHERM.2004.1318307
  • Filename
    1318307