• DocumentCode
    3242362
  • Title

    Multicast Parallel Pipeline Router Architecture for Network-on-Chip

  • Author

    Samman, Faizal A. ; Hollstein, Thomas ; Glesner, Manfred

  • Author_Institution
    Inst. of Microelectron. Syst., Tech. Univ. Darmstadt, Darmstadt
  • fYear
    2008
  • fDate
    10-14 March 2008
  • Firstpage
    1396
  • Lastpage
    1401
  • Abstract
    This paper presents a flexible mesh router architecture using synchronous parallel pipeline worm-switching supporting unicast and multicast services. A very flexible mechanism to manage broadcast-flow to share the communication link in on-chip network is proposed. The proposed mechanism guarantees, that all flits in multicast packets can be accepted in their multiple destination nodes. Our network-on-chip (NoC) is implemented based on modular synthesizable VHDL objects. The architecture is flexible to design new NoC prototypes. Area overhead to update the NoC from unicast to multicast with the same routing algorithm is only about 15%.
  • Keywords
    hardware description languages; logic design; network-on-chip; VHDL; communication link; mesh router architecture; multicast parallel pipeline router architecture; network-on-chip; on-chip network; synchronous parallel pipeline worm-switching; Clocks; Energy consumption; Network interfaces; Network synthesis; Network topology; Network-on-a-chip; Pipelines; Prototypes; Routing; Unicast;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design, Automation and Test in Europe, 2008. DATE '08
  • Conference_Location
    Munich
  • Print_ISBN
    978-3-9810801-3-1
  • Electronic_ISBN
    978-3-9810801-4-8
  • Type

    conf

  • DOI
    10.1109/DATE.2008.4484869
  • Filename
    4484869