GMDS: Hardware implementation of novel real output queuing architecture

Author

Arteaga, R. ; Tobajas, F. ; Esper-Chain, R. ; de Armas, V. ; Sarmiento, Roberto

Author_Institution

Inst. for Appl. Microelectron., Univ. of Las Palmas de Gran Canaria, Las Palmas de Gran Canaria

fYear

2008

fDate

10-14 March 2008

Firstpage

1450

Lastpage

1455

Abstract

In this paper, a real output queuing switch prototype implementation is presented. This implementation is based on a novel high speed multidrop backplane and a general purpose line card which includes a Virtex-II 6000 FPGA. This switch is named GMDS (gigabit multidrop switch) and its main features are the switch matrix replacement by the multidrop backplane -increasing system reliability-, variable length packet switching support -avoiding bandwidth efficient loss-, multiple output queuing structure for supporting QoS (quality of service) and a minimum speedup.

Keywords

packet switching; quality of service; queueing theory; GMDS; QoS; Virtex-II 6000 FPGA; general purpose line card; gigabit multidrop switch; multidrop backplane; multiple output queuing structure; quality of service; real output queuing architecture; variable length packet switching support; Backplanes; Field programmable gate arrays; Hardware; Microelectronics; Packet switching; Prototypes; Quality of service; Queueing analysis; Switches; Throughput;

fLanguage

English

Publisher

ieee

Conference_Titel

Design, Automation and Test in Europe, 2008. DATE '08

Conference_Location

Munich

Print_ISBN

978-3-9810801-3-1

Electronic_ISBN

978-3-9810801-4-8

Type

conf

DOI

10.1109/DATE.2008.4484878

Filename

4484878