DocumentCode
3242560
Title
Evaluating and improving performance of multimedia applications on simultaneous multi-threading
Author
Chen, Yen-Kuang ; Debes, Eric ; Lienhart, Rainer ; Holliman, Matthew ; Yeung, Minerva
Author_Institution
Microprocessor Res. Labs., Intel Corp., USA
fYear
2002
fDate
17-20 Dec. 2002
Firstpage
529
Lastpage
534
Abstract
This paper presents the study and results of running several core multimedia applications on a simultaneous multithreading (SMT) architecture, including some detailed analysis ranging from memory-bounded kernels to computational-bounded functions. A performance metric to evaluate effective SMT performance gain is introduced, and compared to similar metrics on symmetric multiprocessor (SMP) systems. In addition, we analyze and compare SMT versus SMP systems, and highlight the advantages in the studied applications. The results indicate that sharing the cache in SMT processors can provide better cache locality and thus better performance although sharing the cache can introduce cache conflicts and reduce the actual cache size available for each logical processor. We also propose "mutual prefetching" -a technique to schedule threads so that they prefetch data for each other in order to reduce cache miss penalty.
Keywords
cache storage; multi-threading; multimedia computing; processor scheduling; cache conflicts; cache locality; cache miss penalty; cache sharing; cache size; computational-bounded functions; memory-bounded kernels; multimedia applications; mutual prefetching; performance metric; simultaneous multithreading architecture; symmetric multiprocessor systems; thread scheduling; Computer architecture; Decoding; Delay; Kernel; Microprocessors; Multithreading; Pipelines; Prefetching; Surface-mount technology; Yarn;
fLanguage
English
Publisher
ieee
Conference_Titel
Parallel and Distributed Systems, 2002. Proceedings. Ninth International Conference on
ISSN
1521-9097
Print_ISBN
0-7695-1760-9
Type
conf
DOI
10.1109/ICPADS.2002.1183452
Filename
1183452
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