• DocumentCode
    3242868
  • Title

    A new flip-flop gate based on floating gates

  • Author

    Cisneros Sinencio, L.F. ; Diaz Sanchez, Alejandro ; Ramirez Angulo, Jaime

  • Author_Institution
    Timing Solution Operation, MCST Freescale Semiconductors, Puebla, Puebla, Mexico
  • fYear
    2004
  • fDate
    8-10 Sept. 2004
  • Firstpage
    219
  • Lastpage
    221
  • Abstract
    This paper proposes a new family of CMOS latches based on floating gate inputs. The main goal of this logic family is to achieve low area and low power requirements. A comparison of this Iogic family with logic families based on pass transistors or standard CMOS is included in this paper.
  • Keywords
    CMOS logic circuits; Fabrication; Feedback circuits; Flip-flops; Inverters; Latches; MOS capacitors; Nonvolatile memory; Timing; Voltage control;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electrical and Electronics Engineering, 2004. (ICEEE). 1st International Conference on
  • Conference_Location
    Acapulco, Mexico
  • Print_ISBN
    0-7803-8531-4
  • Type

    conf

  • DOI
    10.1109/ICEEE.2004.1433880
  • Filename
    1433880
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3242868