• DocumentCode
    3242969
  • Title

    Software transformations for sequential test generation

  • Author

    Balakrishnan, Arun ; Chakradhar, Srimat T.

  • Author_Institution
    RUTCOR, Rutgers Univ., Piscataway, NJ, USA
  • fYear
    1995
  • fDate
    23-24 Nov 1995
  • Firstpage
    266
  • Lastpage
    272
  • Abstract
    This paper presents software (model) transformations that can be used to effectively generate high fault coverage test sets. Unlike synthesis or design for testability methods which involve hardware modifications, this approach does not modify the hardware design. Instead, it transforms a software model of the design into a new software model that has desirable testability properties. A sequential test generator generates tests for the new model. The new model may not be functionally equivalent to the original design but our transformations guarantee that the tests generated for the new model can always be inverse mapped to serve as tests for the original design. Experimental results show that significantly high fault coverage can be achieved by using this approach
  • Keywords
    design for testability; logic testing; sequential circuits; software engineering; timing; DFT; high fault coverage test sets; inverse mapping; sequential circuits; sequential test generation; software model; software transformations; testability properties; Automatic logic units; Circuit faults; Circuit synthesis; Circuit testing; Design for testability; Hardware; National electric code; Sequential analysis; Sequential circuits; Software testing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Test Symposium, 1995., Proceedings of the Fourth Asian
  • Conference_Location
    Bangalore
  • Print_ISBN
    0-8186-7129-7
  • Type

    conf

  • DOI
    10.1109/ATS.1995.485346
  • Filename
    485346