Rhino blocks pulse-Doppler radar framework

This paper concerns development of a pulsed-Doppler radar system prototyping framework designed for deployment on the Reconfigurable Hardware Interface for computiNg and radiO (Rhino) platform. The Rhino platform combines a low-cost Field Programmable Gate Array (FPGA) and an ARM processor, designed for use in prototyping Software Defined Radio applications. The Rhino is intended as both a training platform and research tool for skills development in this field [1]. The project reported on in this paper involves develop of a software and gateware application framework for Rhino to facilitate lab-based testing and hardware-in-the-loop simulation for radar applications. The framework comprises a collection of `radar blocks´, programmed in a hardware description language, that are connected together and run on the Rhino´s FPGA, and controlled by Linux-based embedded software on the ARM. The performance of a standard pulsed-Doppler radar system was tested. The results show the functions operate correctly, but the data rates are restrictive. The conclusions discuss advantages and disadvantages of the system, together with further plans for improving the framework.